Performance Monitoring in RISC-V using perf - Atish Patra, Western Digital

Performance Monitoring in RISC-V using perf - Atish Patra, Western Digital Performance analysis using a dedicated hardware performance monitoring unit(PMU) has become ubiquitous in the modern era of computing. A PMU unit consists of several programmable registers that can be used to monitor micro-architectural information using userspace tools such as perf. This was one of the key missing pieces in RISC-V software ecosystem until now. Linux kernel for RISC-V had a very basic perf support due to the missing features in RISC-V ISA. However, an SBI PMU extension and ISA extension (“SScofpmf“) were recently proposed. This allows developing a RISC-V platform that is on par with any other ISA in terms of perf capabilities including virtualization support. The SBI PMU extension also added support for a set of novel firmware counters to allow users to gain insight into firmware data during performance analysis. Linux kernel and firmware support for both the proposed extension are under development. This talk will pr